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嵌入式OS--3G手機(jī)操作系統(tǒng)

手機(jī)/網(wǎng)絡(luò)/動漫游戲開發(fā)

嵌入式OS--WinCE

單片機(jī)培訓(xùn)

嵌入式硬件設(shè)計

嵌入式OS--VxWorks

PowerPC嵌入式系統(tǒng)/編譯器優(yōu)化

3G手機(jī)軟件測試、硬件測試

云計算、物聯(lián)網(wǎng)

其他類

　

　

合作企業(yè)最新人才需求公告

曙海最新動態(tài)

• SOC的設(shè)計方法與實現(xiàn)
• 低功耗電路的特殊設(shè)計
• 各種運算電路、濾波電路的設(shè)計考量
• 調(diào)制解調(diào)電路的算法與設(shè)計
• 傅利葉變換電路的設(shè)計技巧

第一部分 - Introduction

1. What is SoC? and why is it important for Wireless, why not use a DSP?
2. Impact and examples of applications
3. Tools and metrics for analysis of performance, cost and power.
4. Impact on memory subsystem
5. Exploration of architectural space and alternatives
6. Design choices (algorithm mappings), pipelining v/s concurrent, test methodology
7. Components of a wireless modem

Assignment: Analyzing requirements for a balanced design from a system perspective

第二部分 - Arithmetic Building Blocks and Fixed Point Arithmetic

1. Representations and notations
2. Fixed point arithmetic v/s floating point
3. Adders:? RCA, CLA, CSA
4. Multiplier designs: Booth recoding and low power implications
5. Array multipliers using counters, impact on layout.? Pipelined designs.
6. Modeling of finite register length effects
7. Block floating point representations and Dynamic range
8. High performance, low power arithmetic blocks
9. Lab: verilog and synthesis of diff arithmetic blocks, +, *. Compare area v/s speed v/s power

第三部分 - Digital Filters

1. Types of filters and their applications, decimation /interpolation.
2. Spectral requirements, channel equalization and? inter symbol interference
3. FIR filters
4. IIR filters, numerical stability issues. Implications of pipelined performance of multipliers on IIR filters.
5. Adaptive filters, Decision feedback equalizer
6. Design and test tradeoffs
7. Examples of High performance, low power? ???design and implementations
8. Lab: Design filters (FIR, IIR, adaptive filters) for different constraints

第四部分 - Coding and Forward Error Correction

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1. Forward error correction and it’s application in wireless modems
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2. Convolutional coding and decoding (Viterbi algorithm)
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3. Trellis coding (if time permits)
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4. Turbo-coding and decoding
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5. Design tradeoffs, ACS units, memory addressing schemes, scaling/wraparound, pipelining
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6. Examples of high performance systolic design, low power designs and implementations
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7. Lab: Design a viterbi decoder for a convolutional for 3G standard, implement a scaled down version of it.
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第五部分 - Transforms – Fourier Transforms

1. Applications : OFDM modulation in wireless systems (used in 802.11a and 802.11g)
2. Discrete Fourier transform
3. Applications
1. Decomposition and the Fast Fourier Transform
2. Variants and mixed radix transforms
3. Memory architectures, addressing schemes, block floating point, pipelining
4. Testing - Design of a FT block.
1. High performance, low latency
2. High performance, high throughput
3. Programable
4. Reconfigurable

Lab: Design and implement a butterfly unit, build a 16 point pipelined FFT block. Synthesize and analyze the timing and determine pipelining. Understand the contributions of the different components to gate count and power consumption.

第六部分 - System Design – Case Study

1. The design of a communications system
1. XDSL
2. Wireless modem
2. The implications of the various tradeoff.
3. System constraints include multichannel, high performance design, single channel low power design, etc.
4. Lab: Catchup

 

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